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TTTech Computertechnik (Austria)

TTTech Computertechnik (Austria)

45 Projects, page 1 of 9
  • Funder: European Commission Project Code: 271813
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  • Funder: European Commission Project Code: 236701
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  • Funder: European Commission Project Code: 607727
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  • Funder: European Commission Project Code: 101082476
    Overall Budget: 1,438,620 EURFunder Contribution: 1,438,620 EUR

    Upcoming space exploration missions envisage precise and safe landing on planetary bodies as well as navigating orbiters, landers, space drones, and robots. Such missions will be performed at various distances from Earth, reaching from the vicinity of Earth and Moon out to several astronomical units for targets like Mars, asteroids or the icy moons of Jupiter and Saturn. A reliable execution of the operations mentioned above can only be achieved by implementing spacecraft autonomous operation and utilising the target body as a navigation reference. This brings a novel requirement for the incorporation of a higher-than-before grade of knowledge about the target, based on a-priori data and on measurements collected during the mission. Examples are globally geo-referenced features originating from mapping missions or the 3D structure of the landing area measured by the spacecraft in the final phase of a landing. This introduces the need for significantly improved on-board processing capabilities and smart algorithms for a wide range of space exploration missions with differentiated demands. Thus, SENAV aims to enable breakthroughs in technologies and scientific instrumentation for space science and exploration missions including those described in the Global Exploration Roadmap, with strong focus on optical navigation for orbiters, landers, drones, and robots with respect to fully autonomous navigation even for unknown environments. In order to enable these missions, SENAV will start (at TRL2-3) to develop and advance smart algorithms, optimized software solutions and miniaturized HW modules, all to be validated through analogous test in laboratory environment aiming to achieve TRL4+ for all HW and SW technologies. Consequent optimization of the payload data processing system accompanied by use of COTS components, as well as the miniaturization of high-performance hardware for integration into small space platforms, will contribute to the desired technological breakthroughs.

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  • Funder: European Commission Project Code: 640243
    Overall Budget: 3,115,220 EURFunder Contribution: 3,115,220 EUR

    The growing complexity of space systems is creating the need for high speed networking technologies to interconnect the different elements of a spacecraft. This interest has spurred initiatives by both ESA and NASA to define the next generation networking technologies for Space. In both cases, Ethernet has been the preferred choice due to its wide adoption in terrestrial applications and because it is fully specified in standards to ensure interoperability. The requirements for integrated circuits that have to operate in space are very different from those that are used in terrestrial applications. In particular, the radiation is much more intense and causes several types of effects on the devices that compromise their reliability. Therefore, special “rad-hard” design and manufacturing techniques are needed for devices that will operate in space. This means that to implement Ethernet in space systems, rad-hard Ethernet components have to be designed. The goal of this proposal is to design and manufacture rad-hard Ethernet PHYs (Physical layer transceivers). In particular a 10/100Mbps PHY is targeted as the first short term objective. This device will enable the use of Ethernet in space systems and also provide the starting point for the long term objective of implementing a Gigabit Ethernet PHY for space. To that end, the proposal includes a feasibility study and also contributions to the 1000BASE-T-1 Ethernet standard. To implement the Ethernet PHYs, the consortium has significant analogue (Arquimea) and digital (IHP) design capabilities. In addition, it has also experience on the upper layers of Ethernet and its use in Space systems (TTTech) and on the design and implementation of Ethernet PHYs and Ethernet standards (Universidad de Nebrija). Finally, the electronic technology and manufacturing capabilities are also covered (ATMEL) as are the space system perspective and testing (Thales Alenia Space Spain).

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