The high breakdown voltage and large sheet carrier density of GaN based HEMTs provide major advantages for rf and microwave systems owing to their power handling capability. These advantages have also underpinned the emergence of GaN based components for low frequency power electronics. The latter is a major growth area as energy efficiency and sustainability become critical factors in the design of electrical systems. The overwhelming cause for reduced electrical power efficiency in active electronic components and systems is unwanted increases in operating temperature, which degrade power gain in amplifiers, the internal quantum efficiency of light emitting diodes and power conversion efficiency of diode lasers. As an example of the impact device heating on system efficiency, about 70% of the electrical power consumed by mobile telephone transmitter is wasted as heat owing to Joule heating in the electronics and consequent reductions in power gain of its constituent transistors. The most effective way to limit the temperature rise of a semiconductor device is to introduce high-thermal conductivity heat spreading layers as close as possible to its active region, for example over the top of the device or growing the device structure on a thermally conducting substrate. Typically GaN based HEMTs of the type used in rf circuits and high power electronics are grown on SiC or increasingly Si wafers substrates. Whilst SiC is a better thermal conductor than Si, polycrystalline or crystalline diamond are far superior, better even than metals. Recently GaN HEMT grown on crystalline diamond substrates have been recently demonstrated. However, the small size (5 x 5 mm) of current crystalline diamond (PD) substrates and their high cost prohibit this ideal approach. Thus, a polycrystalline diamond substrate offers the best solution. The calculations show that the larger thermal conductivity of polycrystalline diamond could bring to power HEMT performance compatible or better than that on SiC or Si substrates. To date, the most widely investigated method of exploiting PD substrates in GaN power HEMT technology has been to grow the III-Nitride layers on a Si substrate, then transfer the epitaxy to carrier substrate and finally bonding the device layers to the PD wafer. The procedure involves two wafer bonding steps, a process that requires minimal wafer bow if breakage is to be avoided, something that is difficult to achieve owing to the lattice mismatch between Si and III-Nitride materials. There is also a tendency for the final structure to delaminate and despite several years of development by companies like Group4Labs, SOITEC and Nitronex, commercial products are still not established. To overcome these difficulties, an alternative approach has been developed by the Applicants in collaboration with Element 6. Briefly, this involves forming a composite structure comprising a thin layer of Si on a thicker layer of polycrystalline diamond, intimately contacted without wafer bonding. The upper Si surface is suitable for immediate III-Nitride growth. More information is given in section 3. One patent application has already been filed (world wide) and a second is in preparation; in both instances Bath has assigned its rights to Element 6. Independently of Element 6 and other parties, Bath has developed methods for growing III-Nitride hetero-epitaxy on these complex Si/PD substrates. The results of applying these methods to realise high quality III-Nitride epitaxial layers on Si/PD substrates has recently been reported in ICNS9, critical details in the process were not disclosed and thus the opportunity exists to create an intellectual property portfolio covering the realisation of device grade III-Nitride epitaxial films on Si/PD heat extracting substrates to complement the very separate existing IP covering the manufacture of the latter. The new knowledge will be owned in its entirety with the University of Bath.

GaN power electronics, in particular, AlGaN/GaN high electron mobility transistors (HEMT) are currently being developed and starting to be applied for power conversion, radar, satellite and communication applications. Switched mode power systems based on this will deliver improved efficiency, hence forming a key enabling technology for the low carbon economy. Although performance of these devices is fully sufficient to enable disruptive changes for many system applications, reliability is presently still in question, not only in the UK and Europe, but also in the USA and Japan. This proposal aims at developing a new electrical methodology to study and understand reliability of GaN based HEMTs, in particular to identify the nature of electronic traps generated during the operation of GaN HEMTs, and which affect their lifetime. The programme is supported by key UK, European and US industries (International Rectifier UK, Fraunhofer Institute IAF Germany, UMS Germany, TriQuint USA), and builds on leading expertise in the field of GaN HEMT reliability developed at the Center for Device Thermography and Reliability (CDTR) in Bristol, established in various research programmes in Bristol funded by EPSRC and the US Office of Naval Research (ONR). The focus of this work will lie in overcoming the challenge that the highly accurate standard Capacitance-Voltage (CV) or Conductance technique for probing electronic traps in semiconductor devices cannot be performed on transistor structures relevant to real applications. This is because these techniques require large transistor structures to have enough capacitance to be measurable. Realistic devices have short gate length with consequently too low a capacitance to be accurately measured at the typical measurement frequency of 1kHz-1MHz, also any damage introduced into a device during device operation is typically in too small an area to be easily detectable using traditional techniques. In contrast, methods which can be applied to small III-V FET devices such as current-DLTS or transconductance dispersion respectively use a non-equilibrium pulse technique which is prone to misinterpretation, or have only given qualitative information to date. A key insight which underpins this proposal is that electronic traps in or near the channel primarily generate dispersion in a device below the pinch off voltage in the sub-threshold regime of operation which will be exploited in this programme. We will develop a dynamic transconductance method for GaN HEMT reliability analysis, suitable for small HEMT devices and insensitive to gate leakage currents. The development of this new electrical methodology which delivers the advantages of the quasi-equilibrium capacitance techniques but in small devices, will allow accurate measurements of degradation induced trap properties to be made for the first time. Noise measurements will complement this novel trap analysis, in additional we will benefit from the pulsed electrical-optical trapping analysis technique we developed in the ONR funded DRIFT programme. The work will advance the understanding of GaN HEMT device degradation during operation, i.e., device reliability, and will keep the UK at the forefront of internationally leading semiconductor device reliability research. The methodologies to be developed will also have direct applicability to the burgeoning worldwide effort in III-V CMOS technology for scaled low-power logic.

Power electronics are seldom seen, yet our daily lives would be very different without them. Power electronics are crucial to improving the battery life of a mobile phone & to maximising the efficiency of high-voltage transmission lines. They are found in railways & hybrid cars, in TVs & energy efficient lighting. Although not perhaps obvious, power electronics are vital to meeting the CO2 reduction targets set by Government. The use of these technologies in the control of electrical machines in factories is predicted to save up to 9% of total electrical energy consumption in the UK. In addition, power electronics are going to be key to controlling the renewable energy sources of the future low carbon economy, which will be producing 30% of our energy by 2020. With a predicted 50% improvement in energy efficiency over current silicon devices, transistors produced from gallium nitride (the same semiconductor material used in low energy LEDs) have the potential to revolutionise power electronics. By working together, research teams from the Universities of Glasgow, Cambridge, Nottingham, Liverpool, Bristol, Sheffield & Manchester will develop & prototype highly efficient, gallium nitride power electronics devices with world-leading performance. Critically, routes to manufacture in a silicon wafer fabrication facility will be developed. Making these step changes is an outstanding opportunity for the 19 silicon manufacturing facilities in the UK, as the global power electronics market is currently worth £135 billion, & growing at a rate of 10% per annum. The outcomes will also underpin next generation applications in high-value manufacturing sectors including traditional UK strengths such as the automotive, aerospace, consumer electronics, lighting, healthcare & energy industries. . Not surprisingly, global competition in the area of gallium nitride power electronics is fierce, & a number of high profile research projects have recently been established in Europe, the US & the Far East. This flagship UK project is a consortium of world-leading University research groups who together have the skill, expertise & critical mass to compete successfully against the rest of the world. To achieve our challenging goals, Cambridge, Nottingham & Sheffield will together focus on the growth & evaluation of gallium nitride materials on silicon substrates to produce the starting semiconductor wafers required for manufacture. Bristol & Nottingham will perform detailed simulations of device performance to inform the choice of gallium nitride materials & also the specific transistor structures for the various applications. Glasgow & Liverpool will combine expertise to develop procedures for the manufacture of gallium nitride transistors using "silicon friendly" approaches & then combine these processes to produce world-leading devices. Manchester, Nottingham & Bristol will evaluate the transistors in measurement systems which mimic the various real world applications for which power electronics are required. Throughout the project, there will be continual feedback between the teams to ensure that optimsied devices are produced. For scientific, technical & economic reasons, a number of UK based companies spanning semiconductor wafer growth, silicon based power electronics device manufacture, & systems suppliers using power electronics components have aligned themselves with the project, keen to exploit the outcomes of the research. By developing world-leading gallium nitride power electronics components using silicon manufacturing approaches, this project, which is directly aligned with the UK Engineering and Physical Sciences Research Council energy efficiency & manufacturing the future strategies , will deliver internationally leading scientific outputs & next generation technologies which UK companies will be in a position to quickly take forward thereby maximising both academic impact & economic benefit.

Power electronics and electrical machines are key components in a low-carbon future, enabling energy-efficient conversion and control solutions for a wide variety of energy and transportation applications. The strength of the UK manufacturing base and its strategic importance to the UK was highlighted in the UK government strategy document "Power Electronics: A Strategy for Success" (UK government Department for Business Innovation and Skills, October 2011). This calls for concerted action across the industrial and academic communities to ensure that the full potential of this growing global market can be realised for the UK economy. Specific recommendations relevant to the UK academic community include: 1) the development of a co-ordinated strategy for postgraduate training; 2) support for research focussing on underpinning the core technology areas whilst ensuring that the national capability in Power Electronics remains internationally leading; 3) establishment of a Virtual Centre linking world-class UK universities with each other and with industry. A core team including the universities of Bristol, Cambridge, Greenwich, Imperial College, Manchester, Newcastle, Nottingham, Sheffield, Strathclyde and Warwick, has been formed to develop this proposal for a UK Virtual Centre. Our vision is that the Centre will be the UK's internationally recognised provider of world-leading, underpinning power electronics research, combining the UK's best academic talent. It will focus on sustaining and growing power electronics in the UK by delivering transformative and exploitable new technologies, highly skilled people and by providing long-term strategic value to the UK power electronics industry. Centre activities will be divided into three main strands: research, community and pathways to impact. Our research activities will bring together the leading academic research groups from across the UK to address key research challenges, build critical mass and develop a widely recognised internationally leading research capability. We will develop a UK research strategy for power electronics which will build on foresight activities to inform our research direction. Our community support activities will build capacity through the training of researchers at doctoral and postdoctoral level. We will extend our research funding to the broader community through themed calls for pump priming, strategic support and feasibility projects. In addition we will support and coordinate responses to major initiatives from national and international funding bodies. Pathways to impact will include: 1) the establishment and development of the Centre brand and communication mechanisms, 2) the development and implementation of an exploitation plan which benefits UK industry, 3) support for government policy development and 4) the development of collaborative links with key power electronic research teams around the world. The Centre programme focuses on fundamental power electronics research at low technology readiness level (TRL) and hence supports a wide range of application areas with a medium to long-term time horizon. Key challenges to be addressed are: increased efficiency, increased power density, increased robustness, lower electromagnetic interference (EMI), higher levels of integration and lower through life cost. The work programme is split into four high-level themes of Devices, Components, Converters and Drives, each of which will address the key challenges, supported by a coordinating Hub. The themes will deliver the majority of the technical output of the Centre.

The urgent need for EV technology is clear. Consequently, this project is concerned with two key issues, namely the cost and power density of the electrical drive system, both of which are key barriers to bringing EVs to the mass market. To address these issues a great deal of underpinning basic research needs to be carried out. Here, we have analysed and divided the problem into 6 key themes and propose to build a number of demonstrators to showcase the advances made in the underlying science and engineering. We envisage that over the coming decades EVs in one or more variant forms will achieve substantial penetration into European and global automotive markets, particularly for cars and vans. The most significant barrier impeding the commercialisation EVs is currently the cost. Not until cost parity with internal combustion engine (ICE) vehicles is achieved will it become a seriously viable choice for most consumers. The high cost of EVs is often attributed to the cost of the battery, when in fact the cost of the electrical power train is much higher than that of the ICE vehicle. It is reasonable to assume that that battery technology will improve enormously in response to this massive market opportunity and as a result will cease to be the bottleneck to development as is currently perceived in some quarters. We believe that integration of the electrical systems on an EV will deliver substantial cost reductions to the fledgling EV market Our focus will therefore be on the two major areas of the electrical drive train that is generic to all types of EVs, the electrical motor and the power electronics. Our drivers will be to reduce cost and increase power density, whilst never losing sight of issues concerning manufacturability for a mass market.