The NET4EXA project aims to create an advanced interconnect for HPC and AI systems, including Large Language Models, that will scale to hundreds of thousands of computing nodes. The interconnect forms the backbone of such systems, and their overall performance is intimately tied to the scalability of the network and its tight coupling with the high-end compute elements. Building on the successful BXI* European HPC Interconnect, whose earlier versions (BXIv1 and BXIv2) have been deployed in European supercomputers ranking among the TOP15, and based on the research for its evolution carried out in the RED-SEA and other previous European RIA projects, NET4EXA will pursue the development of the next generation of European Interconnects (BXIv3). This includes both the switch and network interface, encompassing both hardware and its associated software. The project will showcase a fully functional Pilot at TRL 8, poised for adoption and integration into exascale and post-exascale European supercomputers. NET4EXA will also prepare the subsequent version, BXIv4, planned for implementation after this Innovation Action. The project will contribute by offering analysis and preliminary design for upcoming interconnect features, thus paving the way for continued progress in the field. Leveraging two decades of BULL experience in building HPC solutions, with now more than 40 Top500 entries in 2024, the project outcomes will fit the technological requirements for state-of-the-art HPC solutions to be implemented in European and international supercomputers and datacentres from 2025 onward. *BXI: BullSequana eXascale Interconnect

Computer systems have faced significant power challenges over the past 20 years; these challenges have shifted from the devices and circuits level, to their current position as first-order constraints for system architects and software developers. TANGO’s goal is to characterise factors which affect power consumption in software development and operation for heterogeneous parallel hardware environments. Our main contribution is the combination of requirements engineering and design modelling for self-adaptive software systems, with power consumption awareness in relation to these environments. The energy efficiency and application quality factors are integrated in the application lifecycle (design, implementation, operation). To support this, the key novelty of the project is a reference architecture and its implementation. Moreover, a programming model with built-in support for various hardware architectures including heterogeneous clusters, heterogeneous chips and programmable logic devices will be provided. TANGO will create a new cross-layer programming approach for heterogeneous parallel hardware architectures featuring automatic code generation including software and hardware modelling. This will consider power, performance, data location and time criticality optimization, in addition to security and dependability on the target hardware architecture. These results will be demonstrated in two real-world applications: reconfigurable power optimized connected platform and HPC. In order to improve collaboration and sustainability of TANGO’s and fellow projects results, TANGO considers the foundation of a Research Alliance in which complementary research efforts into novel programming approaches will nucleate, leading to a strong research collaboration and effective integration of project results.

Extreme Data is an incarnation of Big Data concept distinguished by the massive amounts of data that must be queried, communicated and analyzed in (near) real-time by using a very large number of memory/storage elements and Exascale computing systems. Immediate examples are the scientific data produced at a rate of hundreds of gigabits-per-second that must be stored, filtered and analyzed, the millions of images per day that must be mined (analyzed) in parallel, the one billion of social data posts queried in real-time on an in-memory components database. Traditional disks or commercial storage cannot handle nowadays the extreme scale of such application data. Following the need of improvement of current concepts and technologies, ASPIDE’s activities focus on data-intensive applications running on systems composed of up to millions of computing elements (Exascale systems). Practical results will include the methodology and software prototypes that will be designed and used to implement Exascale applications. The ASPIDE project will contribute with the definition of a new programming paradigms, APIs, runtime tools and methodologies for expressing data-intensive tasks on Exascale systems, which can pave the way for the exploitation of massive parallelism over a simplified model of the system architecture, promoting high performance and efficiency, and offering powerful operations and mechanisms for processing extreme data sources at high speed and/or real-time.

The Mont-Blanc 2020 (MB2020) project ambitions to initiate the development of a future low-power European processor for Exascale. MB2020 lays the foundation for a European consortium aiming at delivering a processor with great energy efficiency for HPC and server workloads. A first generation product is scheduled in the 2020 time frame. Our target is to reach exascale-level power efficiency (50 Gflops/Watt at processor level) with a second generation planned for 2022. Therefore, we will, within MB2020: 1. define a low-power System-on-Chip (SoC) implementation targeting Exascale, with built-in security and reliability features; 2. introduce strong innovations to improve efficiency with real-life applications and to outperform competition (vector instruction implementation, memory latency and bandwidth, power management, 2.5D integration); 3. develop key modules (IPs) needed for this implementation; 4. provide a working prototype demonstrating MB2020 key components and system level simulations, with a co-design approach based on real-life applications; 5. explore the reuse of these building blocks to serve other markets than HPC. Our key choices are: a) To use the ARM ISA (Instruction Set Architecture) because its has strong technological relevance and it offers a dynamic ecosystem, which is needed to deliver the system software and applications mandatory for successful market acceptance. b) To design, implement or leverage new technologies (Scalable Vector Extension, NoC, High Bandwidth Memory, Power Management, …) as well as innovative packaging technologies to improve the versatility, performance, power efficiency, reliability, and security of the processor. c) To improve on the economic sustainability of processor development through a modular design that allows to retarget our SoC for different markets.

The purpose of this proposal is to enable a diverse set of multiscale, multiphysics applications -- from fusion and advanced materials through climate and migration, to drug discovery and the sharp end of clinical decision making in personalised medicine -- to run on current multi-petascale computers and emerging exascale environments with high fidelity such that their output is "actionable". That is, the calculations and simulations are certifiable as validated (V), verified (V) and equipped with uncertainty quantification (UQ) by tight error bars such that they may be relied upon for making important decisions in all the domains of concern. The central deliverable will be an open source toolkit for multiscale VVUQ based on generic multiscale VV and UQ primitives, to be released in stages over the lifetime of this project, fully tested and evaluated in emerging exascale environments, actively promoted over the lifetime of this project, and made widely available in European HPC centres. The project includes a fast track that will ensure applications are able to apply available multiscale VVUQ tools as soon as possible, while guiding the deep track development of new capabilities and their integration into a wider set of production applications by the end of the project. The deep track includes the development of more disruptive and automated algorithms, and their exascale-aware implementation in a more intrusive way with respect to the underlying and pre-existing multiscale modelling and simulation schemes. The potential impact of these certified multiscale simulations is enormous, and so we aim to promote the VVUQ toolkit across a wide range of scientific and social scientific domains, as well as within computational science more broadly. Scientific excellence and outreach will be overseen by a Scientific Advisory Board, while exploitation, including economic and societal impact, will be assisted by the project’s Innovation Advisory Board.